1. Field of the Invention
This invention relates to a receiving apparatus, a transmitting/receiving apparatus, and communicating method, and is suitably applied to a radio communication system such as a portable telephone system.
2. Description of the Related Art
In this type of radio communication systems, an area for providing communication service is divided into cells of the desired size, and base stations are placed in each of cells as fixed radio stations, so that a portable telephone, which is a movable radio station, may perform radio communication with the base station of the cell where the telephone exists. In this way, a so-called cellular system is constructed. In various systems as communication systems between portable telephones and base stations, time division multiple access system is introduced as typical one.
As shown in FIG. 1A and 1B, for example, in TDMA system, a stated frequency channel is temporally partitioned into frames F0, F1, . . . of the stated time width, each of the frames is partitioned into time slots TS0-TS3 of the stated time width, and the transmission signal is transmitted with employing the frequency channel at the timing of the time slot TS0 which has been allocated to the station itself, so that plural communication (so-called multiplex communication) is realized with the single frequency channel, and the frequency is utilized efficiently. In the following description, the time slot TS0 which has been allocated to transmission is referred to as the transmission slot TX, and a data block (that is an information unit) which is transferred in one transmission slot TX is referred to as a slot.
Referring to FIG. 2 and FIG. 3, a transmitting apparatus and a receiving apparatus of a radio communication system for performing transmission/reception employing this TDMA system is explained. The transmitting apparatus and the receiving apparatus shown in FIG. 2 and FIG. 3 are respectively mounted on, for instance, a portable telephone and a base station of a movable telephone system, and used for a communication from a portable telephone toward a base station (so-called upward communication) and a communication from a base station toward a portable telephone (so-called downward communication).
As shown in FIG. 2, a transmitting apparatus 1 is roughly composed of a convolutional coding circuit 2, an interleave buffer 3, a slotting process circuit 4, a modulating circuit 5, a pilot symbol adding circuit 6, a transmitting circuit 7, and an antenna 8, and adapted to input an information bit sequence S1, which is a transmission data, to the convolutional coding circuit 2 at first.
The convolutional coding circuit 2, which comprises a shift register of the stated number of stages and an exclusive-or circuit, performs convolutional coding with the inputted information bit sequence S1, and outputs a coded bit sequence S2 to the interleave buffer 3. The interleave buffer 3 stores the coded bit sequence S2 in the internal storage region, in a regular order; when the coded bit sequence S2 has been stored in the entire storage region (that is, when the desired quantity of the coded bit sequence S2 has been accumulated), it rearranges the order of the coded bit sequence S2 at random (hereinafter, this rearranging of the order is referred to as interleaving), and then outputs a processed coded bit sequence S3 to the slotting process circuit 4. Besides, the interleave buffer 3 has the storage capacity which corresponds to the plural slots, so that the coded bit sequence should be distributed to the plural transmission slots TX.
The slotting process circuit 4 partitions the coded bit sequence S3 for each stated number of bits, in order to allocate the coded bit sequence S3 to the transmission slots TX, and then sequentially outputs a coded bit group S4 to the modulating circuit 5. The modulating circuit 5 applies the stated modulation processing (for instance, modulation processing of synchronous detection system such as QPSK modulation) to the supplied coded bit group S4 respectively, and then outputs the resulted information symbol group S5 to the pilot symbol adding circuit 6.
As shown in FIG. 4, the pilot symbol adding circuit 6 adds the pilot symbols P, as the headers, to the forefront position of each symbol group (that is, the front of the information symbols I) of the information symbol group S5 which have been partitioned in accordance with the transmission slots TX, and then outputs a processed transmission symbol group S6 to the transmitting circuit 7. Furthermore, the pilot symbol P, which is added at this point, is a symbol of the pattern which has been already known to the receiving apparatus side, and the receiving apparatus side is adapted to estimate the characteristics (for instance, the situation of fading, etc.) of the transmission line, by using this pilot symbol P.
The transmitting circuit 7 performs filtering process sequentially with the transmission symbol group S6 to which this pilot symbol has been added, and then, performs digital-to-analog conversion processing with the transmission symbol group S6 to produce a transmission signal. Then, the transmitting circuit 7 performs frequency conversion with the transmission signal to produce a transmission signal S7 of the stated frequency channel, amplifies the transmission signal S7 into the stated electric power, and transmits it via the antenna 8. In this way, the transmission signal S7 is transmitted from the transmitting apparatus 1, in synchronism with the timing of the transmission slot TX.
On the other hand, as shown in FIG. 3, a receiving apparatus 10 is roughly composed of an antenna 11, a receiving circuit 12, a transmission line estimating circuit 13, a demodulating circuit 14, a slot linking process circuit 15, a de-interleave buffer 16, and a Viterbi decoding circuit 17, and it is adapted to receive the transmission signal S7 which has been transmitted from the transmitting apparatus 1 via the antenna 11, and to input the transmission signal S7 to the receiving circuit 12 as a reception signal S11. The receiving circuit 12 amplifies the inputted reception signal S11, then, performs frequency conversion with the reception signal S11, takes out a base band signal thereby, performs filtering process with the base band signal, and performs analog-to-digital conversion process with the base band signal. In this way, the receiving circuit 12 takes out a reception symbol group S12 which corresponds to the above-mentioned transmission symbol group S6, and outputs the reception symbol group S12 to the transmission line estimating circuit 13.
The transmission line estimating circuit 13, which is a circuit for examining the characteristics of the transmission line and for performing the equalize process based on the result of the examination, estimates the characteristics of the transmission line by referring to the pilot symbol P which is included in the reception symbol group S12, and calculates the inverse characteristics of the transmission line on the basis of the result of the estimation. Then, the transmission line estimating circuit 13 performs the convolutional multiplication, of the numerical value which is indicating the inverse characteristics of the transmission line in the temporal region, with respect to each information symbol portion of the reception symbol group S12, employing the equalizing circuit which comprises an equalizer, so that it eliminates the influences such as fading, etc. which have been exerted at the transmission line. By this processing, the transmission line estimating circuit 13 restores the information symbol group S5 which has been transmitted, and outputs this information symbol group to the demodulating circuit 14 as the reception information symbol group S13.
The demodulating circuit 14 performs the stated demodulation process with the reception information symbol group S13, so as to restore the coded bit group S14 which corresponds to the coded bit group S4 of the transmission side, and then outputs this to the slot linking process circuit 15. Besides, as noise components have been added to the coded bit group S14 at the transmission line, each bit of the coded bit group S14 is not a binary signal which takes a value "1" or a value "0", but is a multiple-valued signal. The slot linking process circuit 15, is a circuit for linking the coded bit group S14 which is fragmentarily obtained in units of a slot in order to become a continuous signal. It links the coded bit group S14 together when the coded bit group S14 have been accumulated by the quantity which corresponding to the storage capacity of the de-interleave buffer 16 of the succeeding stage, and then outputs a processed coded bit sequence S15 to the de-interleave buffer 16.
The de-interleave buffer 16, which has the storage capacity corresponding to the plural slots, stores the supplied coded bit sequence S15 in the internal storage region sequentially, and rearranges the order of the coded bit sequence S15 in the inverse procedure of rearranging performed in the interleave buffer 3 of the transmitting apparatus 1, so as to return it to the original order, and then outputs a coded bit sequence S16 to the Viterbi decoding circuit 17 (hereinafter, this returning to the original order is referred to as de-interleaving). The Viterbi decoding circuit 17, which comprises a soft decision Viterbi decoding circuit, considers a trellis of convolutional code on the basis of the inputted coded bit sequence S16, estimates the most likely state out of all state transitions which can be taken by the data (so-called maximum likelihood sequence estimation), restores thereby a transmitted information bit sequence S18, and outputs this.
By the way, in such conventional receiving apparatus 10, the symbols are temporally arranged in each slot and sent, as it is adapted to eliminate influences which have been exerted through the transmission line by performing convolutional multiplication of the temporal region employing the equalizing circuit which comprises an equalizer. In this connection, there is such a problem that the configuration of the receiving apparatus is complicated. Besides, in the above-mentioned TDMA mode, communication quality may be different depending upon the timing of the transmission slot TX; in such conventional receiving apparatus 10, the reliability which indicates the communication quality of the transmission slot TX has not been arranged to reflect on the coded bit which has been sent by that slot. Therefore, there are such disadvantages that the precision of maximum likelihood sequence estimation of the Viterbi decoding circuit 17 can not be improved, and the transmitted information bit sequence can not be restored with high precision.